AES Multi-purpose crypto engine

Overview

The AES Multi-Purpose crypto engine includes a generic and scalable implementation of the AES algorithm and a configurable wrapper making the solution suitable for a wide range of low-cost & high-end applications.

Implementation aspects

The AES Multi-Purpose crypto engine is easily portable to ASIC and FPGA . It supports a wide range of applications on various technologies. The unique architecture enables a high level of flexibility. The throughput and features required by a specific application can be taken into account in order to select the most optimal configuration.

Key Features

ASIC and FPGA
Supports a wide selection of programmable ciphering modes based on NIST SP 800-38:
- Non-chaining modes: ECB, CTR
- Chaining modes: CBC, CFB, OFB
- Cyphertext stealing modes: CBC-CS
- Authentication: CMAC (OMAC1)
- Authentication & Confidentiality: CCM, GCM
- Confidentiality on storage devices: XTS/XTS-CS
Masking option available with excellent protection against SPA & DPA
Context switching
Data interface: AMBA (AHB/AXI:AXI-4) with optional DMA
Control interface: APB or AXI4-lite

Benefits

Unrivaled speed performance
Optimal and tailored implementation to your needs
Highest performance/area ratio for a large range of applications
Reconfigurable and scalable features
Portable and optimized to ASIC or FPGA technology
Upgradeable to new performance requirements or to new generations of ASIC or FPGA technology

Block Diagram

Applications

Ideal for any application, examples:
- Wireless and wired communications
- Digital Cinema
- DRM
- Encrypted data storage
- Industrial
- Cloud computing
- Defence
- Automotive
- General MCU’s
- Etc…

Deliverables

Netlist or RTL
Scripts for synthesis
Self-checking TestBench based on FIPS vectors
Datasheet
Integration guide

Technical Specifications

Maturity

Silicon proven

Availability

Now

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