Geon Secure Execution Processor delivers secure code execution by supporting two secure contexts. All code and data belonging to a secure context is cryptographically isolated in main memory, so even complete software breach outside of secure context doen not compromise its security (confidentiality or integrity).
Cryptographic operations can be performed with single Keccak (SHA3) core or by combination of cryptographic hash primitives (SHA3 or SHA2) and symmetric ciphers.
Despite upgrades allowing for secure execution processing, the Geon processor maintains high configurability, performance and efficiency of the proven BA22. Performance is remaining in-line with BA22-CE.
The processor is already verified at system level and suitable for diverse security needs.
Secure Execution Processor
Overview
Key Features
- Security Features
- Two cryptographically isolated secure execution contexts
- Cryptographic primitives agnostic
- Lowest overhead implementation with single Keccak (SHA3) core
- Alternativelly any cryptographic hash function and symmetric cipher can be used
- Supports and validated with Rubicon Zero-Knowledge Identity Plaform
- High Performance 32-bit CPU
- 1.79 DMIPS/MHz
- Variable length (16/24/32/48 bits) instruction encoding
- Single-cycle execution on most instructions
- Fast and precise internal interrupt response
- Custom user instructions
- Small Silicon Footprint & Low Power
- Industry-leading code density
- Compact code minimizes instruction area & power
- 32-bit architecture reduces power-draining memory accesses
- 19k gates and as little as 0.05W/MHz on 90nm
- Fast & Flexible Memory Access
- Harvard-style Caches and MMU separate for Instructions and Data
- Tightly coupled Quick Memory (QMEM) for fast and deterministic access to code and/or data
- Efficient Power Management
- Further reduces power consumption by 2x to 100x using dynamic clock gating for individual units
- Software controlled clock frequency in slow and idle modes
- Interrupt wake-up in doze and sleep modes
- Advanced Debug Capability
- Conventional target-debug agent with a debug exception handler
- Non-intrusive debug/trace for both the CPU and the system
- Complex chained watchpoint and breakpoint conditions
- Optional Processor Units
- Programmable Vectored Interrupt Controller
- Timer Unit
- Debug Unit
- MDB support
- Trace port support
- ROM patching Unit
- Floating Point Unit
- Hardware Multiplier/Divider
- Integrated Peripherals
- 32 bits-wide tick timer and Programmable interrupt controller with 32 maskable interrpt sources
- Optional Peripherals
- AMBA bus infrastructure cores
- Microcontroller peripherals such as GPIO, UART, Real-Time Clock, and Timers
- Serial communication cores such as I2C and SPI
- Memory controllers, interconnect IP and more
- Easy Software Development
- Eclipse IDE for Windows, Linux
- ANSI C/C++ compiler, debugger, linker, assembler, & utilities
- Architectural simulator
- Ported libraries & RTOS
Block Diagram
Technical Specifications
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