IP Catalog > Peripheral IP > Memory Controller & PHY IP > eMMC IP > eMMC Controller IP > SD/eMMC Flash Controller

SD/eMMC Flash Controller

Overview

The Controller IP for SD and eMMC interfaces including managed NAND devices

The IP for SD/SDIO/eMMC is a family of system-level IP consisting of host controllers and PHY IP. Our host controller IP for SD/SDIO/eMMC provides connectivity with removable and embedded storage media, including SD 6.0, MMC memory cards, and eMMC 5.1 devices. The covered memory-card density ranges from SDSC through SDHC up to SDXC with a full range of supported speeds: DS, HS, SDR12/25/50/104, and DDR50. The supported eMMC devices include up to HS400.

Key Features

  • Command Queuing Engine (CQE) 
    • Reduces latency on small data transfers
  • Supports Default Speed, High Speed, and UHS- I (SDR12, SDR25, SDR50, SDR104, and DDR50)
    • Wide range of supported devices
  • Supports all eMMC 5.1 Speeds: SDR, DDR, HS200, and HS400
    • Wide range of supported devices
  • Selectable SDMA or ADMA2 (scatter-gather) Engine
    • Effective DMA access

Benefits

  • High Bandwidth and Low Latency: Strong system performance
  • Highly Integrated IP Offering: Fast system integration with high confidence and low cost
  • Wide Support of Standards: System flexibility for embedded and expandable storage

Technical Specifications

Maturity
Available on request
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