SD 4.1 Host Controller Software Stack

Overview

This is a production-ready stack for Arasan’s eMMC Host Controller IP that is used to connect to SD, SDIO, or eMMC devices.

The SD4/SDIO4/eMMC 4.5.1 Stack can also be used for validating a device during its development and integration life cycles thereby helping designers to reduce the time to market for their product. The modular neX+ stack is architected to be OS and platform independent which eases porting effort. It has a thin OS and hardware abstraction layer making it highly portable. The neX+ stack provides a generic API set to access, control and configure the bus driver, host controller driver and the underlying hardware. The SD4/eMMC 4.5.1 stack includes functions for initialization, sending of commands, data transfer, power management, SDIO interrupt handling, bus configuration, client driver matching, host controller hardware configuration and shutdown. The neX+ stack can support a single host controller with multiple slots or multiple host controllers with multiple slots.

Key Features

  •  
  • Compliant with
    • SD Host Controller Specification v4.1
    • SD Memory Specification v4.1v
    • SDIO Specification v4.1
    • eSD Specification v2.1
    • eMMC specification Version 4.51,
    • MMC Specification v4.3
  • Multiple host controllers support
  • Multiple slots per host controller
  • 1bit, 4bit SD modes
  • 1 bit, 4bit and 8 bit MMC modes
  • High speed mode up to 208MHz SD host clock
  • High Capacity Class 2, 4 and 6 SD cards
  • MMCplus and MMCmobile cards
  • Non DMA, Single operation DMA and ADMA modes
  • Supports byte and block mode transfers
  • Card auto detection (Insertion / removal)

vCard bounce condition handling

  • eSD and eMMC cards boot mode support API Interface
  • Generic API interface abstracting protocol specific details
  • Non-blocking data transfer APIs

Development Environment

  • Linux / Fedora 13 kernel version 2.6.xx
  • x86 PC
  • Arasan SD4/SDIO4 Host Controller

Block Diagram

SD 4.1 Host Controller Software Stack Block Diagram

Technical Specifications

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Semiconductor IP