The MVD RX MPEG-TS Interface is a drop-in module that includes the following functions:
• 188, 204 or 208 bytes MPEG-TS input
• DVB-SPI interface output
• 188 bytes MPEG-TS output
• MPEG-TS packets output at regular intervals
• Bitrate calculation (with PCR)
Rx MPEG TS Interface
Overview
Key Features
- De-buffering and de-jittering MPEG-TS packets
- Single clock (125MHz or higher)
- Supports CBR input streams only (a BYPASS mode is available for VBR input streams)
- Supports 188, 204 or 208 bytes packet input
- Supports Data Packet or Data Burst format
- Respects the PCR Accuracy according to TR 101 290 standard (+/- 500ns) (PCR mode)
- Auto-adaptation of frequency offset according to TR 101 290 standard (27MHz +/- 810Hz) (PCR mode)
- Auto-adjustment for a bitrate variation up to 32kbits without any discontinuity of the Stream at the output
- For a bitrate variation higher than 32kbit/s, the core is restarted
- Programmable Latency
- Design delivered as Netlist for ISE or VIVADO
Block Diagram
Applications
- RX MPEG-TS Interface may be used in applications related to IPTV and/or DVB/MPEG-2 transport streams.
Deliverables
- Datasheet
- Netlist for core generation
- VHDL top file
- VHDL source code : can be delivered as an option under NDA and other specific clauses
Technical Specifications
Availability
Available
Related IPs
- ISO/IEC 7816-3 digital controller for interface device compliant with ETSI TS 102 221 and EMV 2000 standards
- MPEG TS Serializer
- MPEG TS Deserializer
- ETR101290 IP core (Checks MPEG TS stream conformity to ETSI TR 101 290 V1.4.1 (2020-06))
- PCI Master/Target Interface Core
- 32-bit, 33 MHz Multifunction Target Interface