ROM Compiler IP, UMC 40nm LP process
Overview
UMC 40nm LP Via1 ROM compiler with Sleep mode.
Technical Specifications
Short description
ROM Compiler IP, UMC 40nm LP process
Vendor
Vendor Name
Foundry, Node
UMC 40nm LP
UMC
Pre-Silicon:
40nm
LP
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- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k
- Metal programmable ROM compiler - Memory optimized for low power and high density - Dual Voltage - compiler range up to 1024 k