RLDRAM II Controller Intel® FPGA IP

Overview

Key Features

• Support for industry-standard RLDRAM II components
  • Common I/O (CIO) and separate I/O (SIO) device support
• Flexible and robust design
  • Non-multiplexed addressing
  • Datapath generation
  • Data strobe signal (DQS) and non-DQS capture modes
  • Intellectual property (IP) functional simulation models for use in Intel FPGA-supported VHDL and Verilog HDL simulators
  • Easy-to-use IP Toolbench interface and automatic constraint generation
• This IP is included in the IP Base Suite which is bundled with Intel® Quartus® Prime Standard and Pro Edition Software.

Technical Specifications