RF ESD library in TSMC 55nm LP

Overview

RF ESD cells in TSMC 55nm LP targetting low-capacitance ESD protection.

This library is a production-quality, silicon-proven ESD library in TSMC 55nm. The library does not have general ESD architecture as it is not a full I/O, but rather is a collection of standalone ESD cells that target low-capacitance RF ESD protection. The library’s ESD targets are consistent with ANSI, JEDEC and ESDA standards. The library includes a wide- variety of low-capacitance RF and analog ESD. There have operating ranges from 0 to 5V protection and support a wide range of high-performance interfaces including HDMI, LVDS, USB and wireless front-ends. Also included is a range of IEC 61000-4-2 system-level ESD protection that supports digital and analog I/O cells.

Operating Conditions

Parameter Value
VDDIO 2.5V
Core VDD 0.9V
BEOL Any (built to M3)
Tj -40C to 125C

Cell List

Cell Name Function
AV_RF RF ESD Cell
AV_RF_HALF Half-sized RF ESD Cell
AV_VDD5 5V ggNMOS ESD Clamp
AV_VDD33 Full sized 3.3V ESD Power Clamp
AV_VDD33_QRTR Reduced Sized 3.3V ESD Power Clamp
AV_VDD25 Full Sized 2.5V ESD Power Clamp
AV_VDD25_QRTR Reduced Sized 2.5V ESD Power Clamp
AV_VDD18 Full Sized 1.8V ESD Power Clamp
AV_VDD18_QRTR Reduced Sized 1.8V ESD Power Clamp

ESD Targets

  •  HBM: 1kV and 2kV, compliant with ANSI,JEDEC, ESDA  JS-001-2014
  •  CDM: 250V and 500V, complaint with ANSI, JEDEC,  ESDA JS-002-2014
  •  Latch-up: +/-125mA, complaint with JEDEC, ANSI

 

Technical Specifications

Foundry, Node
55nm/65nm
Maturity
Silicon-Proven
Availability
Immediate
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Semiconductor IP