Queue Structure

Overview

The A2Q implements hardware queues for use as FIFOs and LIFOs for inter-process communications, especially in real-time applications. They can be used for secure communications between intelligent DMA controllers, CPUs and other intelligent I/O devices. These queues can be used to, in many cases, eliminate the RTOS from time critical sections of complex System-on-Chip designs.

Technical Specifications

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Semiconductor IP