Fast Quantum Safe Engine for ML-KEM (CRYSTALS-Kyber) and ML-DSA (CRYSTALS-Dilithium) with DPA

Overview

The Quantum Safe Engine (QSE) IP provides Quantum Safe Cryptography acceleration for ASIC, SoC and FPGA devices. The QSE-IP-86 core is typically integrated in a hardware Root of Trust or embedded secure element in chip designs together with a PKE-IP-85 core that accelerates classic public key cryptography and a TRNG-IP-76 core that generates true random numbers. For highly secure applications requiring additional protection against differential power analysis (DPA) attacks, a DPA version of the QSE is available.

The QSE supports the FIPS 203 ML-KEM and FIPS 204 ML-DSA standards. The embedded QSE core firmware allows the core functionality to be updated to adapt to potential future updates in the NIST specifications.

Key Features

  • Compliant with FIPS 203 ML-KEM and FIPS 204 ML-DSA standards
  • Uses CRYSTALS-Kyber, CRYSTALS-Dilithium quantum-resistant algorithms
  • Includes SHA-3, SHAKE-128 and SHAKE-256 acceleration
  • The embedded QSE CPU combined with Rambus-supplied firmware implements the full FIPS 203/204 protocols
  • Can be used stand alone or integrated into higher function security cores
  • Offered as standard QSE-IP-86 or as DPA-protected QSE-IP-86-DPA
  • Supports ASIC, SoC and FPGA implementations
  • Firmware programmable to allow updates with evolving quantum-resistant standards

Block Diagram

Fast Quantum Safe Engine for ML-KEM (CRYSTALS-Kyber) and ML-DSA (CRYSTALS-Dilithium) with DPA Block Diagram

Deliverables

  • Complete Documentation
    • Integration guides
    • Reference manual
    • Application developer guide
  • RTL and FW Package
    • Verilog RTL for synthesis and simulation
    • Standard EDA tool flow scripts and support files
    • Verification test bench and test vectors
  • SW Package
    • Driver Development Kit, including examples

Technical Specifications

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Semiconductor IP