Protocol controller IP for Classical CAN / CAN FD / CAN XL

Overview

CAN XL provides a superior solution for data rates up to 10Mbit/s by maintaining the advantages of the CAN protocol like collision-resolution by non-destructive arbitration.

With respect to the bitrate, CAN XL fills the gap between CAN FD and 100BASE-T1 (Ethernet).

Status

The specification of the CAN XL protocol and physical layer is done by the CiA Special Interest Group CAN XL in the CiA610 document series.

The CiA CAN XL specification started in December 2018 with the goal to have a technically stable CAN XL specification for OSI layer 2 (known as CAN XL protocol) until end of 2020. As second step, the ISO standardization will be started. In addition, many other CAN related standards will be updated simultaneously to support CAN XL. Examples are the CAN Conformance Test according to ISO16845 and the physical layer.

Key Features

  • Support of Classical CAN, CAN FD, and CAN XL
    • Supports mixed CAN FD/CAN XL networks
  • Full support of CAN XL protocol with payloads up to 2048 bytes
    • Enable the use of higher layer protocols (e.g. TCP/IP, SOME/IP) and tunneling of complete Ethernet frames
  • Bit rate of up to 12Mbit/s and more, user configurable
  • Message storage in system memory of SoC
  • Internal DMA engine, X_CAN acts as DMA master for message handling
    • Low CPU impact, any accesses to/from the system memory are done using the internal DMA engine (less interrupts)
  • Only small local memory needed
    • 4 Kbytes considering 128 filter elements and 256 references defined
    • Message storage in system memory
  • AXI4 DMA system, bus interface 32bit, max. burst size of 8x32bit
  • 64-bit Timestamps from external Timebase
  • Enhanced Safety with CAN XL protocol
    • Improved stuff bits for a more robust communication
    • Header and Frame CRC (13 and 32bit) included to enable safe communication
  • Functional Safety Ready
    • X_CAN is being developed as Safety Element out of Context (SEooC) according to ISO 26262-11:2018, Clause 4
    • Safety Manual and FMEDA available on request.

Technical Specifications

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Semiconductor IP