PLL - SMIC 55nm Eflash

Key Features

  • RMS jitter <1.5ps @6.25GHz; Peak-to-peak jitter <6ps @6.25GHz
  • High PSRR

Benefits

  • Cost saving compared to eflash technology

Deliverables

  • Technical documents,GDS hard macro to foundry for IP merge

Technical Specifications

Foundry, Node
SMIC 55nm Eflash
Maturity
Silicon proven
Availability
immediate
SMIC
Silicon Proven: 55nm G , 55nm LL
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Semiconductor IP