Pipelined Multiplier
Overview
Function y = a * b is a high-speed multiplier with configurable width and depth. Inputs and outputs may be specified as either signed or unsigned values. Forms a fundamental building block in all digital processing functions.
Key Features
- Function y = a * b
- Input values as signed or unsigned numbers
- Output values as signed or unsigned numbers
- Configurable data width and pipeline depth
- High-speed fully pipelined architecture
- Support for LUT-based or hard multiplier designs
Benefits
- Technology independent soft IP Core
- Suitable for FPGA, SoC and ASIC
- Supplied as human-readable source code
- One-time license fee with unlimited use
- Field tested and market proven
- Any custom modification on request
Block Diagram
Applications
- Fixed-point mathematics
- Fundamental unit in all digital processing functions
Deliverables
- VHDL source-code (or Verilog on request)
- Simulation test bench
- Examples and scripts
- Full pdf datasheet
- One-to-one technical support
- One years warranty and maintenance