Vendor: SmartDV Technologies Category: PCI

PCI Master Slave IIP

PCI MASTER SLAVE interface provides full support for the PCI MASTER SLAVE synchronous serial interface, compatible with PCI 2.0 s…

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Overview

PCI MASTER SLAVE interface provides full support for the PCI MASTER SLAVE synchronous serial interface, compatible with PCI 2.0 specification. Through its PCI MASTER SLAVE compatibility, it provides a simple interface to a wide range of low-cost devices. PCI MASTER SLAVE IIP is proven in FPGA environment. The host interface of the PCI MASTER SLAVE can be simple interface or can be AMBA APB, AMBA AHB, AMBA AXI, VCI, OCP, Avalon, PLB, Tilelink, Wishbone or Custom protocol.

PCI Master Slave IIP is supported natively in Verilog and VHDL

Key features

  • Compliant with PCI version 2.0 Specification
  • Supports 32 bit address and data
  • Supports all types device select delays
  • Supports arbiter which is 100% PCI specification compliant
  • Supports all types of error detection
  • Provides parity on both data and address and allows implementation of robust client platforms.
  • Full multi-master capability allowing any PCI master peer-to-peer access to any PCI master/target.
  • Synchronous bus with operation up to 66 MHz
  • Forward and backward compatibility with PCI 66 MHz
  • Customization and integration service is available
  • Fully synthesizable
  • Static synchronous design
  • Positive edge clocking and no internal tri-states
  • Scan test ready
  • Simple interface allows easy connection to microprocessor/microcontroller devices

Block Diagram

PCI Master Slave IIP block diagram

Benefits

  • Single site license option is provided to companies designing in a single site.
  • Multi sites license option is provided to companies designing in multiple sites.
  • Single Design license allows implementation of the IP Core in a single FPGA bitstream and ASIC.
  • Unlimited Designs, license allows implementation of the IP Core in unlimited number of FPGA bitstreams and ASIC designs.

What’s Included?

  • The PCI Master Slave interface is available in Source and netlist products.
  • The Source product is delivered in verilog. If needed VHDL, SystemC code can also be provided.
  • Easy to use Verilog Test Environment with Verilog Testcases
  • Lint, CDC, Synthesis, Simulation Scripts with waiver files
  • IP-XACT RDL generated address map
  • Firmware code and Linux driver package
  • Documentation contains User's Guide and Release notes.

Specifications

Identity

Part Number
PCI Master Slave IIP
Vendor
SmartDV Technologies
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

SmartDV Technologies
HQ: India
At SmartDV Technologies™, we believe there’s a better way to approach semiconductor intellectual property (IP) for integrated circuits. We’ve been focused exclusively on IP since 2007—so whether you’re sourcing standards-based design IP for your next SoC, ASIC, or FPGA, or seeking verification solutions (VIP) to put your chip design through its paces, you’ll find SmartDV’s IP straightforward to integrate. By combining proprietary SmartCompiler™ technology with the knowledge of hundreds of expert engineers, SmartDV can customize IP to meet your unique design objectives: quickly, economically, and reliably. Don’t allow other suppliers to force onesize-fits-all cores into your chip design. Get the IP you need, tailored to your specifications, with SmartDV: IP Your Way.
Contact SmartDV Technologies

Learn more about PCI IP core

PCI Express 3.0 needs reliable timing design

PCI Express (PCIe) is an important standard for chip-to-chip communications and serves as a standard for connecting motherboards to peripheral cards. It can be challenging, however, to implement the reference clock so that it meets the various requirements of the PCIe standard.

Frequently asked questions about PCI IP cores

What is PCI Master Slave IIP?

PCI Master Slave IIP is a PCI IP core from SmartDV Technologies listed on Semi IP Hub.

How should engineers evaluate this PCI?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this PCI IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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