The Mentor Graphics?parallel ATA host controller provides an efficient and easy-to-use interface to IDE and ATAPI devices. The core implements programmable I/O, multi-word direct memory access (DMA), and Ultra ATA -33, -66, -100, and -133 modes of operation and supports up to two devices. The core interface to the system-on-chip provides PIO access and DMA capability to optimize data transfers to and from the IDE devices. For ease of integration, the parallel ATA device includes a register set compatible with the Intel chip set, including a descriptor-based scatter-gather DMA
core. This core is compatible with ATA-4, and with Ultra ATA-33, -66, -100, and -133 extensions. However, singleword DMA is not supported.
Parallel ATA IP Host Controller with SpeedSelect
Overview
Key Features
- Programmable I/O modes: 0, 1, 2, 3, and 4
- Synchronous Ultra ATA-33, -66, -100, and -133 modes: 0, 1, 2, 3, 4, 5, and 6
- Easily configured as primary and secondary IDE controller
- Multi-word DMA modes: 0, 1, and 2
- SpeedSelect technology allows core timings to be reprogrammed to support any ATA speed and timing mode at any clock frequency
- Descriptor-based, scatter-gather DMA controller
- Intel register set compatible
- Support for synchronous or asynchronous DMA interface for data transfers
- Supports up to two devices with independent master/slave timing controls
- Supports either CoreFrame or ARM AMBA AHB bus interface
Technical Specifications
Related IPs
- Parallel ATA IP Host Controller with Integrated DMA
- StorSelect Host Controller with Integrated PCMCIA
- PCMCIA IP Host Controller
- UFS 3.1 Host Controller compatible with M-PHY 4.1 and UniPro 1.8
- UFS 4.0 Host Controller compatible with M-PHY 5.0 and UniPro 2.0
- Dual Parallel to Serial ATA 1.5/3.0Gb/s PHY Core