Vendor: ElectraIC Category: Cellular

Optimize your 5G NR O-RAN Split 7.2X design with EIC cutting-edge PRACH Design and Verification Suite

Optimize your 5G NR O-RAN Split 7.2X design with EIC cutting-edge PRACH Design and Verification Suite.

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Overview

Optimize your 5G NR O-RAN Split 7.2X design with EIC cutting-edge PRACH Design and Verification Suite. This comprehensive suite includes an end-to-end MATLAB model, RTL implementation of the MATLAB model, and a robust verification environment for bit-exact simulation and testing. Ensure seamless integration and accelerate your development process with EIC 5G NR O-RAN compatible solution.

Key features

  • Overview:
    • Comprehensive Support: All PRACH formats and configuration indexes described in 3GPP 38.211 are fully supported.
    • Versatile Sequences: Length-139 and length-839 sequences are included.
    • Frequency Multiplexing: Capable of decoding up to 8 frequencies multiplexed PRACHs.
    • Flexible Subcarrier Spacing: Supports both 15 and 30 kHz PRACH subcarrier spacing for short formats.
  • PRACH MATLAB Model:
    • O-RAN Compatibility: Input stimuli generation and C-Plane Section Type: 3 message generation for each PRACH occasion.
    • Configurable Input: Option to constrain the number of frames and resource blocks.
    • Advanced Signal Processing: Three signal processing chains implemented:
      • 1. Full frequency-domain PRACH extraction in double data format for golden reference.
      • 2. Hybrid frequency and time-domain PRACH extraction in double data format using MATLAB’s high-level functions for proof of concept.
      • 3. Hybrid frequency and time-domain PRACH extraction in fixed-point data format for RTL implementation.
    • Precision PDP Calculation: Performed at the end of each processing chain.
    • Configurable Bit Reduction: Allows adjustment of bit reduction amounts at each module’s output.
    • Data Dumping: Possible after each module.
  • PRACH RTL Design:
    • Direct Implementation: RTL implementation of the MATLAB model’s fixed-point signal processing chain.
    • Extensive Frequency Resource Extraction: Capable of extracting up to 8 PRACH frequency resources.
    • Detailed Information: Provides CC ID, Section ID, and RU Port ID information.
    • Flexible Decimation: Supports 1 to 96x decimation.
    • Robust FFT Support: Handles 256 to 8192 point FFT after decimation.
    • Industry Standard Interface: Utilizes AXI4-Stream interface.
  • PRACH RTL Test Environment:
    • AXI4-Stream IQ Data Driver: Takes input stimuli generated by the MATLAB model and feeds them into the RTL signal processing chain.
    • C-Plane Section Type: 3 Message Driver: Processes C-Plane messages generated by the MATLAB model and feeds them into the RTL signal processing chain.
    • MATLAB Model-Based Reference: The PRACH Design and Verification Suite uses the MATLAB model as a reference, allowing for the comparison of outputs from sub-blocks with MATLAB references. This feature simplifies the debugging process and enhances verification accuracy.
    • Extensive Test Scenario Support: Provides RTL verification scenarios for all PRACH formats and indexes.

Block Diagram

PRACH IP Suite block diagram

Benefits

  • Frequency Range: FR1
  • Duplex Mode: TDD
  • Numerology: 1
  • Maximum Frequency Multiplexing: 8
  • Supported Input Sampling Rates: 30,72; 61, 44; 122,8 MSPS
  • PRACH Format Support: All formats
  • PRACH Configuration Index Support: All indexes
  • PRACH Length Support: 139, 839

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
PRACH IP Suite
Vendor
ElectraIC

Provider

ElectraIC
HQ: Turkey
ElectraIC provides electronic circuit design and verification services in the field of ASIC, FPGA and embedded systems. The team has the experience of working with global multinational companies. The company has been involved in and continues to take part in many projects, especially in Aerospace and Defense areas, as well as consumer electronics. Functional safety using DO-254, ISO 26262 and EN 50129 are speciality areas. ElectraIC delivers also trainings on ASIC, FPGA and embedded systems. Contributions ElectraIC can make to your organization:
  • Design IP Cores
  • Design & Verification Services: ASIC / FPGA and Embedded Systems’ development
  • Functional Safety Consultancy & Training Services
  • Trainings: Wide range of trainings with more than 150 different trainings
Contact ElectraIC

Learn more about Cellular IP core

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Frequently asked questions about cellular IP cores

What is Optimize your 5G NR O-RAN Split 7.2X design with EIC cutting-edge PRACH Design and Verification Suite?

Optimize your 5G NR O-RAN Split 7.2X design with EIC cutting-edge PRACH Design and Verification Suite is a Cellular IP core from ElectraIC listed on Semi IP Hub.

How should engineers evaluate this Cellular?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Cellular IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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