NMEA Time of Day (ToD) Slave core

Overview

NetTimeLogic’s NMEATime Of Day (ToD) Slave Clock is a full hardware (FPGA) only implementation of a synchronization core able to synchronize to a Time of Day source via NMEA over UART. The whole interface handling, message parsing, algorithms and calculations are implemented in the core, no CPU is required. This allows running NMEA synchronization completely independent and standalone from the user application. The core can be configured either by signals or by an AXI4Light-Slave Register interface. This core only adapts the second part of the clock, and does no drift or offset correction in the sub second range, this shall be done in a combination with the PPS Slave Clock.

All calculations and corrections are implemented completely in HW.

Key Features

Time of Day Slave Clock
Built-in UART receiver with configurable baud rate
NMEA message parser
Support for NMEA GPZDA and GPRMC messages for time extraction
Quality supervision and filtering of GPRMC messages
Hardware time conversion from Time of Day format (hh:mm:ss dd:mm:yyyy) into seconds since midnight 1.1.1970 (Linux, TAI, PTP)
Second adjustment at the local second overflow
Seconds correction for different time bases (TAI, UTC ...)
In combination with a PPS Slave Clock from NetTimeLogic: synchronization accuracy: +/- 25ns
AXI4 Light register set or static configuration

Benefits

Coprocessor handling NMEA synchronization standalone in the core.
Simple interface

Block Diagram

Applications

Distributed data acquisition
Ethernet based automation networks
Automation
Robotic
Automotive
Test and measurement

Deliverables

Source Code (not encrypted, not obfuscated)
Reference Designs
Testbench with Stimulifiles
Configuration Tool
Documentation

Technical Specifications

Availability

Now

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