Network-on-Chip (NoC) Interconnect IP
Overview
Vtool NoC Interconnect IP is a highly configurable and technology independent IP, built for easy customization and integration into any system using AMBA AXI / APB / AHB standard. Interconnect IP enables connection between multiple master and multiple slave components while guaranteeing low latency and high bandwidth.
Key Features
- AMBA AXI / APB / AHB protocol compliant
- Configurable number of masters and slaves
- Configurable interface parameters:
- address width
- data width - any 2^n bits
- burst length - up to 16 transfers
- transaction ID width
- user-defined signals width
- Round robin, fixed and dynamic priority arbitration
- “Single slave per ID” as cyclic dependency avoidance scheme
- Combinatorial, forward registered, reverse registered and fully registered pipelining options to prevent master/arbitration stalls
- Independent address maps and master-to-slave visibility list for different masters
Benefits
- Fully customizable solution, automatically generated, easy to configure and integrate into any complex ASIC or SoC
- Saves time in complex system development while providing performance and/or area consumption optimization
- Fully flexible solution easy to update and extend for any specific customer need
- Bug-free design coming with complete UVM verification environment and test suite
- FPGA proven
- Option for a full suite combining Vtool services, including design, verification, and embedded
Deliverables
- Fully verified and FPGA-proven RTL written in Verilog
- Full-blown UVM/SV verification environment with UVCs and tests
- Full documentation - Datasheet, User Guide, Test Plan
- Full-fledged support from Vtool’s customization team
Technical Specifications
Maturity
FPGA proven
Availability
Immediately