NAND Flash Controller

Overview

The NFC IP is a NAND Flash Controller for accessing user data from NAND Flash chips. It is designed with scalability in mind and provides standard AXI interface for the ease of integration in SoC design. The NFC has many configurable features to support the requirements for different NAND Flash applications. The NFC has been production proven in different products such as USB, eMMC and Client/Enterprise SSD.

Key Features

Support all kinds of 2D/3D, SLC/MLC/TLC/QLC NAND Flash
Supports 8KB~32KB NAND page size
Support 1 to 16 FLASH channels
Support all Flash command & optional command
Support ONFI 4.2/ONFI 4.1/ONFI 4.0/Toggle 2.0 up to 2400MT/s
Multi LUN/Die operation support
Support CE reduction
Support ODT control
Support high throughput NAND Flash applications
Support AXI interface for the ease of integration
Support command FIFO to minimize CPU command latency
Support 1K+, or 2K+, or 4K+ bytes CW length
LDPC IP (Alcyone) integrated
RAID HW engine integrated
Scramble HW engine integrated

Benefits

Time-to-Market
different NAND Flash Types supported

Block Diagram

Applications

USB, eMMC, SATA, PCIe-NVMe Client/Enterprise SSD controller

Deliverables

RTL code
CPU model driven verification environment
Reference driver firmware
Synthesis script and constraint for ASIC and FPGA
Documentations

Datasheet
Integration guide
Programming guide
Register specification

Training Course

Technical Specifications

Maturity

In production

Availability

available

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