N-channel Multiplexed FIR Filter

Overview

Multi-channel FIR filter permits any number of inputs to be multiplexed into the same filter architecture. Much cheaper than using multiple FIR filter designs in parallel.

Ideal for filtering dual-channel inputs such as complexed valued I/Q.

Key Features

Systolic array for speed and scalability
Up to 8 independent channels
(More channels on request)
Resources shared between all channels
Configurable coefficients for each channel
Configurable data width
Configurable number of taps
Symmetric arithmetic rounding
Output saturation or wrap modes
Much cheaper than using multiple FIR filters in parallel
FPGA sample rates in excess of 550 MHz
Matlab®, FDAtool and Simulink® compatible

Benefits

Technology independent soft IP Core
Suitable for FPGA, SoC and ASIC
Supplied as human-readable source code
One-time license fee with unlimited use
Field tested and market proven
Any custom modification on request

Block Diagram

Deliverables

VHDL source-code (or Verilog on request)
Simulation test bench
Examples and scripts
Full pdf datasheet
One-to-one technical support
One years warranty and maintenance

Technical Specifications

Foundry, Node

All

Availability

Immediate

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