Multi Protocol Switch IP Core for Safe and Secure Ethernet Network

Overview

The CetraC Switch IP core is the ideal solution to interconnect any TSN, Ethernet and ARINC 664 Part 7 (AFDX) equipment for safety critical application.
It is the central element of high performance, safe, real time and deterministic systems and networks.

The CetraC Switch IP core is fully compliant with real time Ethernet/A664 Part 7 protocols and allows both cyclic and event-driven communications in full duplex.

The CetracC technology is developed with modularity and scalability as main drivers such that it allows to add new Ethernet/ARINC664p7 ports within a very short Time To Market.

The IEEE1588 PTPV2 protocol is also available at any port to synchronize the overall devices connected to the network. The CetraC Switch IP core acts as GrandMaster or simply distributes the clock to each connected equipment requiring a common clock.

Several IP core switches can be connected together through a 10Gbps optical fiber link to create any of the three kinds of flexible network architectures for critical systems:
• High speed redundant ring architecture (at up to 10Gbps)
• High speed hierarchical architecture (at up to 10Gbps)
• Mesh network by mixing the two previous architectures.

Key Features

TSN/Ethernet/ARINC664P7 Switch with customizable number of ports up to 1 Gbps.
Support IEEE 1588 PTPV2 as GrandMaster or User
Safe & Secure Ethernet communication
Multi-protocol
Modularity and Scalability capabilities by implementing easily up to 24 ports
Master Clock Synchronization
Compliant with ARINC664 Part 7 (AFDX)
Compliant with ARINC664 Part 7 at 1Gbps (Safe Ethernet)
Compliant with IEEE802.3; UDP, TCP, ICMP, ARP
Compliant with IEEE-1588
Compliant with SNMP
Compliant with ARINC615-A
DO-254 Certification Kit up to DAL-A

Benefits

It supports in one core multi Ethernet based protocols as ARINC664p7, IEEE802.3, IEEE1588 for the smallest footprint available
100% Hardware implementation to target both ASIC and FPGA device : No CPU needed
Manage Deterministic and best effort frames without compromise
Cyber Security friendly
Highly modular and scalable to match easily new protocol standard

Block Diagram

Applications

used as central element of your safe and cyber-secure network

Deliverables

Encrypted RTL source code compliant with CetraC design standard
Reference Design as integration example
Configuration Software tools and Library for Linux-RT Operating System: Linux, Windows, VxWorks.
Support includes technical integration, DO-254 integration"
Also available as COTS hardware in our switch named Babelya for prototyping and evaluation purposes

Technical Specifications

Maturity

ready

Availability

now

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