Multi-channel codec to ASIC / FPGA

Overview

H.264 main profile real time encoder/decoder
Ultrafast Architecture
Excellent video quality
Ultra Low latency<1ms, .
Silicon and FPGA Verified
Spacecraft and Avionics verified, extremely high reliability

Key Features

  • Output: NAL standard packets
  • GOP configuration: I, IP
  • I16x16 and I4x4 all intra prediction modes
  • Multiple inter prediction modes
  • CABAC or CAVLC entropy encoding optional
  • 1/4 sub-pixel motion estimation
  • Mode Decision in 1/4 sub-pixel to get best quality
  • Hadmard transform for intra and inter prediction
  • Deblocking filter
  • VUI
  • Mutli-Channel

Benefits

  • High Performance
    • Cyclone III/IV, Aritix7 1080p@40fps
    • Cyclone V, Arria V, Kintex-7, Virtex-5/6 1080p@60fps
    • Stratix V, Virtex-7 1080p@75fps
    • Parallel multi-core configuration 4K@60fps
  • Single FPGA implementation 1080p 8x ~ 48x
  • - Very low silicon resource on both ASIC and FPGA

Applications

  • Consumer
  • Broadcasting
  • Cloud Computing
  • Defensive devices
  • Wireless communication
  • Avionics
  • Space-grade devices
  • Medical

Deliverables

  • Synthesizable verilog source files or Netlist
  • Verilog testbenches
  • Testing scripts (shell-script, tcl and perl)
  • C-model source files
  • Synthesizing scripts
  • Design and implementation documents

Technical Specifications

Foundry, Node
All
Maturity
1
Availability
Now
×
Semiconductor IP