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MIPI SLIMBUS Verification IP

Overview

MIPI SLIMbus Verification IP Provides the mobile industry a standard, robust, scalable, low-power, high-speed, cost-effective, two wire, multi-drop interface that supports a wide range of digital audio and control solutions for mobile terminals. MIPI SLIMbus Verification IP provides a smart way to verify the MIPI SLIMbus standard data transmission and control interfaces between Host and device. The SmartDV's MIPI SLIMbus Verification IP is fully compliant with version 1.01.01/2.0 MIPI Alliance specification for serial Interface and provides following features.

MIPI SLIMBUS Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

MIPI SLIMBUS Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key Features

  • Supports 1.01.01/2.0 MIPI SLIMbus Specification.
  • Supports Organized TDM frame structure allows SLIMbus to carry Control and Data information.
  • Supports unidirectional CLK line.
  • Supports up to 8 bi-directional data line.
  • Supports Enumeration for device.
  • Supports Arbitration mechanism to access the port.
  • Supports limited retransmission of Messages.
  • Supports Frame layer to interleave Control space and data space in a Sub frame.
  • Supports User defined, Isochronous, Pushed, Pulled and Asynchronous Protocols.
  • Supports all Core Message types.
  • Supports Flow control mechanism.
  • Supports Collision Detection for Message channel as well as for Data channel.
  • Supports error injection and error detection.
  • Supports various Error Management mechanisms.
    • Error on Segments.
    • Framing error.
    • Parity error.
    • Messaging error.
    • Error on Synchronization.
    • CRC error.
  • Supports Constraints Randomization.
  • Supports Callback for the user to process the data and errors in BFM and Monitor.
  • Status counters for various events on bus.
  • Monitors, detects and notifies the test bench of significant events such as transactions, warnings, timing and protocol violations.
  • MIPI SLIMbus verification IP comes with complete test suite to test every feature of MIPI SLIMbus specification.
  • Functional coverage support for MIPI SLIMbus features.

Benefits

  • Faster testbench development and more complete verification of MIPI SLIMbus designs.
  • Easy to use command interface simplifies testbench control and configuration of Host/Device.
  • Simplifies results analysis.
  • Runs in every major simulation environment.

Block Diagram

MIPI SLIMBUS Verification IP Block Diagram

Deliverables

  • -> Complete regression suite containing all the MIPI SLIMbus test cases.
  • -> Examples showing how to connect various components and usage of Host/Device and Monitor.
  • -> Detailed documentation of all classes, tasks and functions used in verification env.
  • -> Documentation also contains Users Guide and Release notes.

Technical Specifications

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