Vendor: Silicon Library Inc. Category: MIPI PHY

MIPI DPHY Receiver on GF55LPe

This IP supports operational data rates 80Mbps to 1.5Gbps per One lane for HS mode, and up to 10Mbps for LP modes transfer rates.

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MIPI D-PHY GlobalFoundries 55nm LPe View all specifications

Overview

This IP supports operational data rates 80Mbps to 1.5Gbps per One lane for HS mode, and up to 10Mbps for LP modes transfer rates.

Key features

  • MIPI D-PHY version 1.2 compliant PHY receiver
  • Consists of 4 data lane and 1 clock lane
  • Supports HS mode (80Mbps to 1.5Gbps) and LS mode (up to 10Mbps)
  • Integrated control interface logic to supports PHY Protocol Interface (PPI)
  • Integrated 100-ohm termination resistors with common-mode biasing
  • Configurable analog characteristics
    • Timing skew
    • Terminator resistance
    • BGR voltage
  • 1.2V power supply
  • Support GlobalFoundry 55nm LPe process

Block Diagram

SLIPMPRDPHG55LE block diagram

What’s Included?

  • Verilog RTL or netlist source code of lane control unit
  • Liberty timing models for synthesis and STA
  • Timing constrains for synthesis and physical layout
  • Verilog behavior model of PHY part
  • Physical design database
  • Integration guidelines

Silicon Options

Foundry Node Process Maturity
GlobalFoundries 55nm LPe —

Specifications

Identity

Part Number
SLIPMPRDPHG55LE
Vendor
Silicon Library Inc.
Type
Silicon IP

Standards & Interfaces

MIPI PHY
MIPI D-PHY

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

Silicon Library Inc.
HQ: Japan
Silicon Library Inc. (SLI) is a leading provider of high speed interface semiconductor IP and IC solutions. SLI's product offerings included silicon-proven/production-proven eDP/DP TX and RX IP, HDMI TX and RX IP, . SLI offers one-stop shop of both Link and PHY as optimally designed solution. In order to maintain the highest IP quality, SLI staffs its own test team and equipments to verify the IP implementation in actual silicon.
Contact Silicon Library Inc.

Learn more about MIPI PHY IP core

Super Edge Medical SoC (SEMC)

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Frequently asked questions about MIPI PHY IP

What is MIPI DPHY Receiver on GF55LPe?

MIPI DPHY Receiver on GF55LPe is a MIPI PHY IP core from Silicon Library Inc. listed on Semi IP Hub. It is listed with support for globalfoundries.

How should engineers evaluate this MIPI PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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