MIPI DEBUG Verification IP

Overview

MIPI DEBUG Verification IP provides a smart way to verify the MIPI DEBUG bi-directional two-wire bus. The SmartDV's MIPI DEBUG Verification IP is fully compliant with MIPI DEBUG version 1.0 specification.

MIPI DEBUG Verification IP is supported natively in SystemVerilog, VMM, RVM, AVM, OVM, UVM, Verilog, SystemC, VERA, Specman E and non-standard verification env

MIPI DEBUG Verification IP comes with optional Smart Visual Protocol Debugger (Smart ViPDebug), which is GUI based debugger to speed up debugging.

Key Features

Compliant with MIPI Debug version 1.0 specification.
Full MIPI Debug functionality.
Support full I3C Slave with CCC, Hot Join, IBI, DAA and HDR mode.
Full Link and Network/Transport layer.
Support Network adaptors for following
- SPP
- STP
- SAM
- TWP
- UART
Supports upto 16 Network Adaptors
Simple interface allows easy connection to microprocessor/microcontroller devices
Callbacks in Master, Slave and Monitor for user processing of data
Notifies the testbench of significant events such as transactions, warnings, timing and protocol violation
Functional coverage of complete MIPI Debug specs.
MIPI Debug Verification IP comes with complete testsuite to test every feature of MIPI Debug specification.
Supports Debug Common Command Codes[CCC].
Debug Network Adaptor Operation Command[DBGOPCODE].
- CAPABILITIES Opcode
- CFG Opcode
- START_NA Opcode
- STOP_NA Opcode
- FIFO_THRESHOLD Opcode
- FIFO_ACTION Opcode
- SELECT Opcode
- REPORT_ERROR Opcode
Debug Action Command[DBGACTION]
- DBGRST Action
- STARTSET and EXECSET Actions
Supports Debug In-Band Interrupts[IBI].
- DBGSTATUS Cause
- DBGDATAREADY Cause
- DBGERROR Cause

Benefits

Faster testbench development and more complete verification of MIPI DEBUG designs.
Easy to use command interface simplifies testbench control and configuration of TX and RX.
Simplifies results analysis.
Runs in every major simulation environment.

Block Diagram

Deliverables

Complete regression suite containing all the MIPI DEBUG testcases to certify MIPI DEBUG Slave/Master device
Examples showing how to connect various components and usage of Master, Slave and Monitor.
Detailed documentation of all class, task and function's used in verification env.
Documentation also contains User's Guide and Release notes.

Technical Specifications

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