Vendor: T2M GmbH Category: MIPI PHY

MIPI D-PHY Rx IP, Silicon Proven in GF 55LP

Version 1.2 of the D-PHY specification is fully complied with by the MIPI D-PHY Analog RX IP Core.

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MIPI D-PHY View all specifications

Overview

Version 1.2 of the D-PHY specification is fully complied with by the MIPI D-PHY Analog RX IP Core. Both the MIPI Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) protocols can be used. This RX PHY is configured with one clock channel and four data lanes. The D-PHY comprises of a digital back end for managing I/O operations and an analogue front end for sending and receiving electrical level signals. The intrinsic resistor is automatically terminated.

Key features

  • Compliant to MIPI Alliance Standard for D-PHY specification Version 1.2
  • Supports standard PPI interface compliant to MIPI Specification
  • Supports synchronous transfer at high-speed mode with a bit rate of 80-2500 Mb/s
  • Supports asynchronous transfer at low power mode with a bit rate of 10 Mb/s
  • Supports ultra-low power mode, high-speed mode and escape mode
  • Supports one clock lane and up to four data lanes
  • Data lanes support transfer of data in high-speed mode
  • Supports error detection mechanism for sequence errors and contentions
  • Supports contention detection
  • Configurable skew option for each Clock and Data lanes
  • Testability for TX, RX and PLL
  • Silicon Proven in GF 55 LPe.

Block Diagram

MIPI D-PHY Rx IP in GF 55LPe block diagram

What’s Included?

  • GDSII & layer map
  • Place-Route views (.LEF)
  • Liberty library (.lib)
  • Verilog behaviour model
  • Netlist & SDF timing
  • Layout guidelines, application notes
  • LVS/DRC verification reports

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Specifications

Identity

Part Number
MIPI D-PHY Rx IP in GF 55LPe
Vendor
T2M GmbH
Type
Silicon IP

Standards & Interfaces

MIPI PHY
MIPI D-PHY

Provider

T2M GmbH
T2M GmbH is the leading Global Technology Company supplying state of the art complex semiconductor connectivity IPs and KGDs, enabling the creation of complex connected devices for Mobile, IoT and Wearable markets. T2M's unique SoC White Box IPs are the design database of mass production RF connectivity chips supporting standards including Wifi, BT, BLE, Zigbee, NFC, LTE, GSM, GNS. They are available in source code as well as KGD for SIP / modules. With offices in USA, Europe, China, Taiwan, South Korea, Japan, Singapore and India, T2M’s highly experienced team provides local support, accelerating product development and Time 2 Market.
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Learn more about MIPI PHY IP core

Super Edge Medical SoC (SEMC)

Post Covid 19, the biggest bet for revival of the industry is on 5G proliferation across the world. It is widely expected that 5G’s Enhanced Mobile broadband (eMMB) with speeds as high as 20X of 4G speed, Ultra reliable and Low Latency Communication ( URLLC) and massive Machine type connectivity (mMTC) will transform the world.

Frequently asked questions about MIPI PHY IP

What is MIPI D-PHY Rx IP, Silicon Proven in GF 55LP?

MIPI D-PHY Rx IP, Silicon Proven in GF 55LP is a MIPI PHY IP core from T2M GmbH listed on Semi IP Hub.

How should engineers evaluate this MIPI PHY?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this MIPI PHY IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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