MIPI D-PHY

Overview

Key Features

• Process: TSMC 40nm 1.1V/2.5V 1P8M LP process
• RX (Sub-LVDS)
• Total 4 RX data lanes and one RX clock lanes
• Input data rate: 600Mbps
• Input voltage range: vcm < VCC25(operating voltage) – 0.9V
• Input differential threshold: vid > 40mV
• RX (MIPI D-PHY)
• Total 4 RX data lanes and one RX clock lanes
• HSM Input data rate: 1000Mbps
• LPM Input voltage range: 0V to 1.2V
• HSM Input common-mode voltage range: 70mV to 330mV
• HSM Input differential threshold: +/- 100mV
• TX (MIPI D-PHY)
• Total 4 TX data lanes and one TX clock lanes
• HSM Output data rate: 1000Mbps
• LPM Output voltage range: 0V to 1.2V
• HSM Output common-mode voltage: 200mV
• HSM Output common-mode voltage range: 150mV to 250mV
• HSM Output differential voltage: 200mV
• HSM Output differential threshold: 140mV to 270mV
• Operated Ambient Temperature: Ta = -40 ~ 85°C
• Operated Junction Temperature: Tj = -40~125°C

Block Diagram

Technical Specifications