MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process
Overview
MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process
Technical Specifications
Short description
MIPI CSI Receiver 1G/ SLVDS 1G /HiSPi 1G, 1.8V/3.3V GPI 100MHz; UMC 28nm HPC Logic Process
Vendor
Vendor Name
Foundry, Node
UMC 28nm
UMC
Pre-Silicon:
28nm
HLP
,
28nm
HPC
,
28nm
HPM
,
28nm
LP
Related IPs
- PLL (Frequency Synthesizer) IP, Input: 5MHz - 100MHz, Output: 62/5MHz - 1GHz, UMC 0.13um HS/FSG process
- LVDS TX IP, 1Gbps for Per-Lane - SMIC 28nm
- 1G TCP Offload Engine TOE +PCIe Very Low Latency (TOE+PCIe)
- 1G TCP Offload Engine TOE Very Low Latency (TOE)
- 1G to 200G High Speed Channelized Ethernet Controller MAC/PCS/FEC
- 1G Unmanaged Ethernet Switch