MIPI C-PHY

Overview

The Qualitas MIPI C-PHY is an advanced hard macro IP designed on Samsung 5nm process node. It adheres to MIPI C-PHY v2.1 standards, enabling high-bandwidth data transmission or reception off-chip at speeds up to 8Gsps per lane.

With integrated TX and RX capabilities on a single lane, it supports flexible role switching to optimize size efficiency as required. Supporting HS, LP, ALP, and CD modes, the C-PHY IP facilitates bi-directional data transmission in LP or HS mode. It also includes essential components such as I/O pads, ESD structures, and BIST features like loopback and scan for seamless integration.

Key Features

Samsung Foundry 5nm low power enhanced (LN05LPE) CMOS device technology
1.2V±5%, 0.75/0.85V±5% power supply
Fully supports MIPI C-PHY v2.1 HS/LP/ULPS TX/RX (Backward Compatible with previous versions)
Supports 80-8000Msps (equivalent to 182.9-18,290Mbps) in C-PHY HS mode
Global operation timing parameters control

Benefits

Small area
Low power consumption
Supports both overdrive (0.85V) and normal (0.75V) power
Lane configurable
Built-in self-test feature capable of producing and checking PRBS random pattern
Supports external loopback test
Highly validated structure in various process nodes

Block Diagram

Applications

Mobile, Automotive, AI, Security, AR/VR, etc

Deliverables

FE-Common: MODEL, TWRAP, TB, LEF, LIBERTY, IPXACT, ATPG, SIPI
BE-Common: CIR, GDS, DRC, LVS, DFMC
DOC-Common: Datasheet, User Guide, Test Guide, Register Setting Guide, Supplement Guide, PLL Calculator

Technical Specifications

Foundry, Node

Samsung Foundry LN05LPE A00

Maturity

Silicon Proven

Availability

Now

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