The Teletrx_7999 is compliant with MIPI A-PHY interface specification version 1.1. It features application on ADAS/ADS surround asymmetric sensor connectivity, meeting ultra-high speed performance and long reach requirement.
The IP contains 1 Lane Sink/Source and supports up to 8Gbps data rate. It includes clean common clock source, high performance equalizer, high jitter-tolerance clock and data recovery in RX. TX has high quality driver and supports parallel 16bit data bus width on interface. Also support uplink driver@100MHz. For test and debug purpose, analog monitor port is built in.
This MIPI A-PHY IP has low power and small area advantages by advanced process TSMC 22nm process node.
MIPI A-PHY Sink/Source IP (1-Lane)
Overview
Benefits
- Expands PAM4 encoding to lower gears, reducing the operating signal rate of these gears and allowing implementation of A-PHY using lower cost legacy cables and connectors.
Applications
- Targeted for ADAS/ADS surround sensor applications and Infotainment display applications in automotive
Technical Specifications
Related IPs
- MIPI D-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI C-PHY-D-PHY Combo PHY IP on TSMC 28nm HPC+
- MIPI CSI DSI C-PHY IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- MIPI D-PHY / C-PHY Combo IP for TSMC (5nm, 6/7nm, 12/16nm, 22nm, 28nm, 40nm)
- Automotive MIPI A-PHY Source IP - 1-Lane
- MIPI RFFE Master IP Core