MIL1553B IP Core

Overview

MIL-STD-1553B is a military specification for a Digital Time Division Command/Response Data Bus, featuring half-duplex, Manchester II encoding. A main bus controller (BC) manages communication, while remote terminals (RTs) respond. It defines terminal operations, word structure, messaging protocol, and electrical characteristics.

Key Features

  • High bit error reliability
  • Dual redundancy : Two buses supported
  • BC, RT and BM Modes are supported.
  • Manchester II encoding
  • Parity & Gap generators & checkers for high data integrity
  • AXI4 Compatibility for user interface
  • IP portable to any available standard FPGA
  • 1 Megabit per sec (Mbps) transfer rate

Block Diagram

MIL1553B IP Core Block Diagram

Applications

  • Weapon Systems
  • Ground Vehicles
  • AEHF Satellite
  • Boeing Aircraft
  • The International Space Station
  • Dassault Rafale
  • Lockheed Martin F-22

Technical Specifications

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Semiconductor IP