MECHATROLINK-III Master/Slave IP

Overview

MECHATROLINK-III Master/Slave IP together with CPU communicates with the products adapting.

MECHATROLINK-III standardized by MECHATROLINK Members Association.

Supported Devices

  • Cyclone V
  • Texas Instruments Sitara™ (Single Slave)

Key Features

  • Functionally compatible with JL-100 which is the ASIC for MECHATROLINK-III Master/Slave communication.
  • Parameters required for MECHATROLINK-III communication are set either by cpu or through external pins.
  • Certified by MECHATROLINK Members Association.

Block Diagram

MECHATROLINK-III Master/Slave IP Block Diagram

Deliverables

  • IP (Encrypted netlist)
  • Reference design
  • User’s manual

Technical Specifications

Short description
MECHATROLINK-III Master/Slave IP
Vendor
Vendor Name
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Semiconductor IP