MACsec - High-Speed Variant

Overview

MACsec is a point-to-point protocol located on layer two (Data Link) of the OSI model. Xiphera's comprehensive MACsec solution portfolio safeguards the confidentiality and integrity of data transmitted over point-to-point communication links, assured by the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM) with 256-bit key length.

The underlying cryptographic engines in the MACsec solutions are powered by Xiphera's in-house designed AES-GCM Intellectual Property (IP) cores.

Xiphera is offering three MACsec variants: MACsec Balanced, MACsec High-Speed, and MACsec Extreme-Speed.

Key Features

  • Optimised resource requirements
  • Compliant with IEEE 802.1AE-2018
  • Powered by AES256-GCM
  • Pure RTL without hidden CPU or software components
  • Efficient and optimised architecture
  • Easy system integration
  • Vendor agnostic FPGA/ASIC implementation

Benefits

  • 53,842 ALMs; designed for efficiency in typical FPGA setups
  • Up to tens of Gbps, ideal for 10/25/40 Gbps links
  • Several bus interfaces available
  • IP core designed in-house at Xiphera
  • Technical support by the original designers and cryptographic experts

Block Diagram

MACsec - High-Speed Variant Block Diagram

Applications

  • Interconnect security for cloud services and data centers
  • Enhanced IP/MPLS network protection
  • IoT device protection within LAN
  • Automotive ethernet communication
  • Secure point-to-point video links

Deliverables

  • Encrypted RTL or source code
  • Sample synthesis scripts
  • Comprehensive simulation test bench, scripts & guide
  • Optional netlist
  • Instantiation file
  • Detailed datasheet and integration guide
  • Please contact sales@xiphera.com for pricing and your preferred delivery method

Technical Specifications

Foundry, Node
Any
Maturity
Hardware Tested
Availability
Immediate
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Semiconductor IP