LVDS Receiver

Overview

The LVDS_RX is CMOS differential line receivers designed for applications requiring ultra low power dissipation, low noise, and high data rates. The devices are designed to support data rates in excess of 800 Mbps (400 MHz) utilizing Low Voltage Differential Swing (LVDS) technology
The LVDS_RX accept low voltage (±50 mV typical) differential input signals and translates them to 3.3V CMOS output levels. The receivers also support open, shorted, and terminated (100Ω) input fail-safe. The receiver output will be HIGH for all fail-safe conditions

Key Features

Fully integrated, compact design
800Mbps(400Mhz) switching rates
60ps differential skew
1.15ns Maximum propagation delay
Single 3.3V power supply (3.0V to 36V range)
Accepts small swing (±50mv typical) differential signal
Support open, short and terminated input fail-safe
Low Power Dissipation (5.01mA @ 3.6V static)

Benefits

High switching speed
Low differential skew
Less propagation delay
Accept small swing in differential signal
Fast time to market

Deliverables

GDSII & CDL Netlist
.lef for PnR
Datasheet
Technical Reference Manual, Design Document

Technical Specifications

Foundry, Node

0.13u Tower

Maturity

Silicon Implemented

Availability

Immediate

TSMC

Pre-Silicon: 130nm LP

Tower

Pre-Silicon: 130nm

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