LVDS and OpenLDI PHY

Overview

Our LVDS (Low Voltage Differential Signaling) and OpenLDI (Open Low-voltage Differential Signaling Interface) PHY which is composed of two 4-lane LVDS PHY, is a high-speed digital interface designed to facilitate the transmission of video and audio signals between various components within electronic devices. Optimized for applications in flat-panel displays, industrial equipment, automotive infotainment systems, and medical devices, the LVDS and OpenLDI PHY ensure reliable, high-quality performance while maintaining low power consumption.

Key Features

  • Silicon proven with maximum speed @1.5Gbps per lane
  • Suitable for Automotive applications with ESD levels: HBM > 4KV and CDM > 750V
  • LVDS TX PHY: 4-data lanes plus 1-clock lane with each lane can be individually turned off
  • Supports long-distance transmission: Capable of maintaining signal integrity over longer cable length
  • OpenLDI PHY: Silicon proven 8-lane OpenLDI PHY
  • PLL supports SSC with 30~100K ± 3.1% range

Block Diagram

LVDS and OpenLDI PHY Block Diagram

Technical Specifications

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Semiconductor IP