LPDDR5X DDR Memory Controller

Overview

MEMTECH’ Olympus Mons-L Series LPDDR5X/LPDDR5 controller provide high-reliability, high-performance, low-latency, multi-port, multi-interface configurable options to meet the application specific requirements. ECC, advanced memory scrubbing with a DMA Controller, many RAS features, High Read and Write Performance, Configurable to support many configurations. Flexible to be quickly adapted to ASICs/Emulators and scalability are some of the many salient features of this memory controller.

Benefits

  • JEDEC LPDDR5X/LPDDR5 devices compatible
  • Data rates up to 8533Mbps
  • Multiple ARM AMBA AXI4/AHB/APB & Custom interfaces
  • DFI5.0 standard interface to integrate with any PHY
  • Configurable design, look-ahead multi-level scheduling for best in class performance
  • Dual channel support, latency just 8 clocks
  • High performance Sequencer with 64 read and 64 write commands
  • ISO26262 and ASIL-B Certified option available
  • Advanced DMA based Scrubbing

Block Diagram

LPDDR5X DDR Memory Controller Block Diagram

Applications

  • Enterprise SSD
  • Data Center Acceleration
  • High-Speed Networking
  • Automotive- ADAS(Advanced Driver Assistance Systems), AV(Autonomous Vehicles), Connected Vehicles, In-vehicle Experience, Mobility as service, Shared Vehicles, Smart Sensors

Technical Specifications

Short description
LPDDR5X DDR Memory Controller
Vendor
Vendor Name
Foundry, Node
7nm, 6nm, 12nm, 16nm, 22nm, 28nm
Maturity
GOLD
Availability
Immediately
TSMC
Pre-Silicon: 7nm
×
Semiconductor IP