The A11B4G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a hybrid successive approximation register (SAR) ADC, with a 11-bit resolution, and a sampling speed of 4 gigasamples per second (GSPS).
The advanced IP block has been designed for the TSMC 28nm HPC+ process to provide superior performance/power specifications.
The cost-effective IP block has been designed and verified for TSMC HPC+ processes and validated at 28 nm process.
Low-power, high-speed 11-bit SAR ADC on TSMC 28nm HPC+
Overview
Key Features
- 11-bit Resolution
- 4 GSPS Sampling Rate
- 132 mW Power Consumption
- 8-bit Effective Number of Bits (ENOB)
- 60 dB Spurious Free Dynamic Range (SFDR)
- 1150 µm x 700 µm Area
- Hard IP Block
- TSMC 28HPC+ CMOS IP
Benefits
- The A11B4G is a unique solution that provides the dual benefit of reaching a high performance, while maintaining low power consumption of 132 mW, making it a perfect fit for designs with low power and high efficiency requirements.
Applications
- High Performance Data Acquisition
- Direct RF Down Conversion
- High-speed test and measurement systems
- Oscilloscopes, spectrometers & digitizers
- Wideband Communications and Networking
- Microwave Receivers
- Software-Defined Radio
- Phased Array and Radar
- LiDAR
Deliverables
- Silicon Validation Report
- Layout View (gds2)
- Integration Support
Technical Specifications
Foundry, Node
TSMC 28nm HPC+
Maturity
Silicon Validated
Availability
Now
TSMC
Silicon Proven:
28nm
HPCP
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