Low-power, high-speed 11-bit, 8 GSPS Analog to Digital Converter IP block - TSMC 28nm HPC+ process

Overview

The A11B8G is a low-power, high-speed analog to digital converter (ADC) intellectual property (IP) design block. It is a hybrid successive approximation register (SAR) ADC, with a 11-bit resolution, and a sampling speed of 8 gigasamples per second (GSPS).

Key Features

11-bit Resolution
8 GSPS Sampling Rate
264 mW Power Consumption
8-bit Effective Number of Bits (ENOB)
60 dB Spurious Free Dynamic Range (SFDR)
1.61 mm2 Area
Hard IP Block
TSMC 28HPC+ CMOS IP

Benefits

The A11B8G is a unique solution that provides the dual benefit of reaching a high performance, while maintaining low power consumption of 264 mW, making it a perfect fit for designs with low power and high efficiency requirements.
The advanced IP block has been designed for the TSMC 28nm HPC+ process to provide superior performance/power specifications.

Applications

High Performance Data Acquisition
Direct RF Down Conversion
High-speed test and measurement systems

Oscilloscopes, spectrometers & digitizers

Wideband Communications and Networking

Microwave Receivers
Software-Defined Radio

Phased Array and Radar
LiDAR

Deliverables

Silicon Validation Report
Layout View (GDSII)
Integration Support

Technical Specifications

Foundry, Node

TSMC 28nm HPC+

Maturity

Silicon Validated

GLOBALFOUNDRIES

Pre-Silicon: 22nm FDX

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