The Zaltys ISDBT-M IP core is a 3-layer ISDB-T hierarchical modulator compatible with the ARIB STD-B31 standard for Terrestrial Integrated Services Digital Broadcasting. The core can process either a single BTS transport stream (containing information for all three layers of the ISDB-T frame structure), a single MPEG transport stream (with user assigned mapping of PID's to layers), or three independent MPEG transport streams, one for each layer. It performs all the necessary processing required to output a complex modulated baseband signal to a pair of external DACs.
The bandwidth of the generated signal is directly related to the supplied system clock, as per the table below. One sample is sent to the external DACs every eight system clock cycles.
ISDB-T Modulator
Overview
Key Features
- Full 13-segment ISDB-T modulator
- ARIB STD-B31 compliant operation, supporting one, two or three-layers
- Flexible transport-stream input interface
- Single BTS input, or
- Single TS input with layer mapping, or
- Individual TS inputs for each layer
- Test-mode traffic generator
- Microprocessor controllable
- Fully synchronous design
- Available now for Xilinx FPGA
Deliverables
- Licence-Specific deliverables include:
- Technology-Specific Netlist
- VHDL Source
- VHDL Test bench
- Synthesis Scripts
- Comprehensive Documentation
Technical Specifications
Foundry, Node
ANY
Availability
Now