Interleaver/De-Interleaver

Overview

Interleaving is a technique commonly used in communication systems to overcome correlated channel noise such as burst error or fading. The interleaver rearranges input data such that consecutive data are spaced apart. At the receiver end, the interleaved data is arranged back into the original sequence by the de-interleaver. As a result of interleaving, correlated noise introduced in the transmission channel appears to be statistically independent at the receiver and thus allows better error correction.

The Lattice Interleaver/de-interleaver IP core supports rectangular block type and convolutional architectures. Rectangular interleaving arranges the input data row-wise in a matrix. The interleaved data is obtained by reading the columns of the matrix. Convolutional interleaving feeds the input data to a number of branches, each of which has a shift register with pre-defined length. The output data is taken from the branch outputs. Lattice’s Convolutional Interleaver/de-interleaver IP Cores are compliant with ATSC and DVB standards, while the Rectangular Interleaver/de-interleaver is compliant with IEEE 802.16a standard.

Key Features

  • High performance and area efficient symbol interleaver/de-interleaver
  • Supports multiple standards, such as DVB, ATSC and IEEE 802.16
  • Convolutional and rectangular block type architectures available
  • Fully synchronous design using a single clock
  • Symbol size from 1 to 256 bits
  • Full handshake capability for input and output interfaces
  • Rectangular block type features
    • Variable block size
    • Variable number of rows
    • Variable number of columns
    • Row permutations
    • Column permutations
  • Convolutional type features
    • User-configurable number of branches
    • User-configurable branch length

Block Diagram

Interleaver/De-Interleaver Block Diagram

Technical Specifications

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Semiconductor IP