Interleaver / De-interleaver

Overview

Key Features

• Support for block or convolutional (de interleaving algorithm.
• Programmable interleaving or deinterleaving functionality.
• Parameterized symbol width and codeword length.
• Programmable block size, number or rows/columns.
• Programmable rows/columns permutations.
• Programmable number of branches and branch length.
• Compatible with continuous or burst mode Reed Solomon codecs.
• Fully synchronous design using a single clock.

Block Diagram

Deliverables

• Synthesizable VHDL or Verilog code.
• Comprehensive test bench.
• Detailed user's guide.

Technical Specifications