Input 800M-1600MHz, output 800M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 40nm Logic Process.
Overview
Input 800M-1600MHz, output 800M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 40nm Logic Process.
Technical Specifications
Short description
Input 800M-1600MHz, output 800M-1600MHz, all digital DLL for DDR4 SDRAM controller usage, supports slave delay line to generate 25%/50%/100% delay in period of FREF,UMC 40nm Logic Process.
Vendor
Vendor Name
Foundry, Node
UMC 40nm
Maturity
Pre-Silicon release
UMC
Pre-Silicon:
40nm
,
40nm
LP
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