Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH/EE2PROM ULP RVT LowK Logic Process
Overview
Input 20M-66M Hz, output 400M-800M Hz, frequency synthesizable PLL; UMC 55nm EFLASH/EE2PROM ULP RVT LowK Logic Process
Technical Specifications
Foundry, Node
UMC 55nm eNVM EFLASH/EE2PROM/uLP-SPLIT_GATE
UMC
Pre-Silicon:
55nm
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