FireGate is a synthesizable IEEE-1394-2008 Beta PHY core and is architected to support data rates of S100 through S3200. It is fully IEEE-1394b compliant and supports all AS5643 requirements.
IEEE-1394b PHY layer Core
Overview
Key Features
- Complete IP solution supporting IEEE-1394b-2008 and AS5643
- Support for speeds from S100 to S3200
- Single-Speed Support (S100, S200, S400, ...)
- Multi-Speed Support (S100 - S400, S800 - S3200)
- Scalable number of PHY ports from 1 to 16
- Integrated support for AS5643 (Mil1394) enhancements
Benefits
- Standalone solution: The PHY IP can be combined with Link Layer IPs, creating smaller, compact solutions. Additional components can be added to create a System-On-Chip (SOC) solution.
- Flexible number of ports: Commercially available PHY chips have a fixed number of ports which for small peripherals is often overkill. On the other hand, host adapters would likely benefit from 3 or more ports and a hub could even have more than that. For a PHY based on FPGA technology, the user can customize the number of ports as required.
- Optional debug and test features: Optionally the user can include debug and test features like BERT (Bit Error Rate Test) Low level data monitoring and Recording
- Field-upgradable: The used FPGAs are field upgradable thus allowing the addition new features or bug fixes, even if the device is already in the field.
- Cost effective ASICS: Once a design is finalized an IP solution offers a very cost effective path to spinning a custom ASIC.