IBM 65nm 10SF Process 24-Bit Stereo Sigma-Delta ADC/DAC

Overview

The I65GV25_CODEC_04 integrates: 2-channel 24-bit sigma-delta ADC, 2-channel 24-bit sigma-delta DAC with headphone driver amplifier, and audio PLL to support a wide range of sample rates.

Key Features

  • Single-ended ADC
    • --THDN:-80dB
    • --Dynamic Range, SNR: 94dB (A-Weighted)
  • DAC Line Output
    • --THDN:-90dB@-6dBFS input
    • -- Dynamic Range, SNR: 98dB (A-Weighted)
    • Headphone Driver Output:
    • –THDN:-65dB
    • -- Dynamic Range, SNR: 94dB (A-Weighted)
  • Audio Serial Interface:
    • --32bit word length I2S mode
    • --Slave/Master mode
  • 2-wire Serial Control Interface(I2C)
  • Master Clock is 256fs
  • Sampling Rates
    • --8kHz, 11.025kHz, 12kHz, 16kHz, 22.05kHz, 24kHz, 32kHz, 44.1kHz, 48kHz and 96kHz
  • Power Supply
    • --1.2V Core Digital Supply typ. (1.08V-1.32V)
    • --2.5V Pad and Analog Supply typ. (2.25V-2.75V)
  • Stereo Line Input and Mono Microphone Input
  • Stereo/Mono Mode
  • Internal PLL as the Audio CODEC Master Clock Generator
  • 16/32Ohm Headphone Drivers

Technical Specifications

Foundry, Node
IBM 65nm
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Semiconductor IP