HMAC Accelerator with SHA-3, SHA-2, SHA-1

Overview

The EIP-59 is the IP for accelerating the various single pass HMAC (FIPS-198-1) algorithms using secure hash integrity algorithms like MD5 (RFC1231), SHA-1 (FIPS-180-2), SHA-2 (FIPS-180-3/4) and SHA-3 (FIPS-202).

Designed for fast integration, low gate count and full transforms, the EIP-59 accelerators provide a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed crypto pipelines.

Key Features

Wide bus interface
Supporting HMAC and Basic Hash operations for all algorithms: MD5, SHA-1, SHA-2 (224, 256, 384, 512), SHA-3 (224, 256, 384, 512)
MAC Key XOR and Message padding
Message data scheduling hardware
Calculation of “inner digest” and “outer digest” from a MAC Key input
Calculation of “inner hash” and “outer hash” from a MAC Key input or “inner digest” and “outer digest” input
MAC Key sizes shorter, equal and longer than algorithm block size
Hash and HMAC context switching
Continued hash / HMAC support
Standard, high frequency and high performance versions available
Secure hash standard Compliant FIPS-180-2, FIPS-180-3, FIPS-180-4
HMAC support for all algorithms, compliant with FIPS-198-1, FIPS-198
Fully synchronous design

Benefits

High-speed HMAC MD5/SHA-1/SHA-2/SHA-3 solution
Silicon-proven implementation
Fast and easy to integrate into SoCs
Flexible layered design
Complete range of configurations
World-class technical support

Applications

Hash
Key exchange
Authentication
SSL
TLS
DLTS
IPsec
Communication protocols

Deliverables

Documentation

Hardware Reference and Programmer Manual
Integration Manual
Verification Specification

Synthesizable Verilog RTL source code
Self-checking RTL test bench, including test vectors and expected result vectors
Simulation scripts
Configurations:

EIP-59h (-buf):

SHA-224/256 + SHA-384/512
68.4K (87.7k) gates
SHA-224/256: 7.88 bits/clk, SHA-384/512: 12.64 bits/clk
up to 1 GHz

EIP-59n (-buf):

SHA-1 + SHA-224/256 + SHA-384/512 + SHA3-224/256 + SHA3-384/512
116.6K (136.7k) gates
SHA-1: 6.32
SHA-224/256: 7.88 bits/clk, SHA-384/512: 12.64 bits/clk
SHA-3-224: 48.00 bits/clk, SHA-3-256: 45.30 bits/clk
SHA-3-384: 34.70 bits/clk, SHA-3-512: 24.00 bits/clk
up to 830 MHz

EIP-59q (-buf):

SHA-224/256 + SHA-384/512 + SHA3-224/256 + SHA3-384/512
112.1k (133.1k) gates
SHA-224/256: 7.88, SHA-384/512: 12.64
SHA-3-224: 48.00, SHA-3-256: 45.30
SHA-3-384: 34.70, SHA-3-512: 24.00
up to 830 MHz

Technical Specifications

Foundry, Node

Any

Maturity

Silicon Proven

Availability

Now

TSMC

Silicon Proven: 7nm , 16nm , 28nm , 40nm G

Request Info