Vendor: Arm Ltd. Category: CPU

Highest Performance CPU with Split-Lock

Cortex-A78AE is the highest performance Cortex-A processor designed for devices undertaking complex and demanding safety-critical…

Overview

Cortex-A78AE is the highest performance Cortex-A processor designed for devices undertaking complex and demanding safety-critical tasks. The Split-Lock capability with second-generation Dual Core Lock-Step (DCLS) enables flexible operations at the highest levels of safety. With the ability to run different workloads concurrently and a 30 percent performance uplift compared to its predecessor, Cortex-A78AE offers the scalable, efficient, heterogeneous compute required for automated driving and autonomous industrial systems.

Key features

  • Highest Sustained Performance
    • The Cortex-A78AE features an advanced energy-efficient microarchitecture designed for performance density to deliver highest peak and sustained single-thread performance in thermally constrained fanless designs.
  • Scalable, Heterogeneous Compute
    • Options for multicore, multi-cluster, accelerator ports and heterogenous compute configurations offer the ability to run different workloads or application footprints, allowing the deployment of the same SoC compute architecture into different domain controllers.
  • Flexibility with Split-Lock
    • Switch between split mode for highest cluster-level performance, lock mode for advanced multicore fault-tolerance with ASIL D/SIL 3 hardware metrics, or hybrid mode to deliver higher compute availability to help achieve ASIL B/SIL 2 safety requirements.

Specifications

Identity

Part Number
Arm Cortex-A78AE
Vendor
Arm Ltd.
Type
Silicon IP

Compute

CPU Architecture
ARM

Files

Note: some files may require an NDA depending on provider policy.

Provider

HQ: Great Britain

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What is Highest Performance CPU with Split-Lock?

Highest Performance CPU with Split-Lock is a CPU IP core from Arm Ltd. listed on Semi IP Hub.

How should engineers evaluate this CPU?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this CPU IP.

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