High Performance VSB/QAM Demodulator Core

Overview

Key Features

• Input interface supports standard IF, low IF, and zero IF tuners.
• 12-bit data interface provides dynamic range needed for effective suppression of adjacent channel interference.
• Digital SAW filter reduces external part count.
• Robust, proprietary acquisition algorithm for better than 100 millisecond acquisition time over a wide range of inputs.
• Proprietary, size optimized, equalizer span of -50 to +100 ƒÝseconds, depending on configuration.
• Fully portable acquisition firmware.
• Implemented with generic microprocessor interface or turn-key with dedicated microcontroller.
• Fully synthesizable RTL targeting multiple advanced silicon technologies.

Benefits

• Performance optimized against real-world field vectors.
• Ready for highly integrated implementations such as SoCs.
• Supports standard IF, low IF, and zero IF tuners.
• Architecture allows rapid area vs. performance optimization to address different markets.
• Full access to source code, documentation, and engineering support.
• Complete and professional package supports rapid integration, modification, and extension of the design.

Deliverables

• Reference C-model (fixed and floating-point programmable)
• Synthesizable RTL
• Comprehensive DSP specification
• Detailed microarchitectural description and physical design guidelines
• Verification Test Plan and Strategy
• Portable Firmware executable and source code.
• Programmer's Model
• Support through technology transition

Technical Specifications