Vendor: TurboConcept Category: Channel Coding

High Performance Turbo Code

TC1600 is ideally suited for applications requiring small to medium block sizes in order to reduce latency and offer a high physi…

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Overview

TC1600 is ideally suited for applications requiring small to medium block sizes in order to reduce latency and offer a high physical layer flexibility. TC1600 implements a very powerful turbo code technology that ensures unmatched FER performance downto FER<1e-5

Key features

  • Outstanding error correction performance - ideal for small/medium block sizes
  • Block size: 4 bytes - 512 bytes (1-byte step)
  • Code rates: 1/3, 1/2, 2/3, 3/4, 4/5, 5/6, 6/7, 7/8
  • Proven Core
  • Scalable throughput - up to 200 Mbits/s
  • Advanced low-complexity architecture
  • Selectable LLR quantization level
  • On-the-fly (Block-by-block) change of configuration
  • Channel quality monitoring

Applications

  • Satellite communications
  • Governmental systems
  • Terrestrial links

Specifications

Identity

Part Number
TC1600
Vendor
TurboConcept
Type
Silicon IP

Files

Product Sheet Download

Note: some files may require an NDA depending on provider policy.

Provider

TurboConcept
HQ: FRANCE
TurboConcept is a industry-recognized and reliable partner for IP Core providing of advanced FEC modules (turbo codes, Polar codes, LDPC codes). We offer best-in-class solutions for 4G-LTE/ 5G NR wireless, satellite communications, backhaul, domestic and governmental systems.
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Frequently asked questions about Channel Coding IP cores

What is High Performance Turbo Code?

High Performance Turbo Code is a Channel Coding IP core from TurboConcept listed on Semi IP Hub.

How should engineers evaluate this Channel Coding?

Engineers should review the overview, key features, supported foundries and nodes, maturity, deliverables, and provider information before shortlisting this Channel Coding IP.

Can this semiconductor IP be compared with similar products?

Yes. Buyers can compare this product with similar semiconductor IP cores or IP families based on category, provider, process options, and structured technical specifications.

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