The Xilinx® HDMI solutions include HDMI TX and RX subsystems. The HDMI Subsystems are designed in compliance with the HDMI Forum version 2.0 of the HDMI specification, released in September 2013 and is primarily used to connect video sources to display devices, such as computer monitors, digital projectors, or digital televisions, and was primarily defined as a digital replacement for analog video standards. The most recent version often referred to as HDMI 2.0 supports throughput of up to 18 Gbit/s. Consequently, it can support from NTSC/PAL through 4k resolutions at up to 60 fps.
HDMI Subsystems supports UltraScale™ and 7-Series Xilinx FPGAs.
To help users in creating video solutions with HDMI interfaces, Xilinx offers prepackaged subsystems for HDMI receive or HDMI transmit. These subsystems integrate commonly used functions with video interfaces such as video timing generation, AXI bridges and optional HDCP function with HDMI controller and work out of the box
HDMI
Overview
Key Features
- HDMI source (TX) Subsystem and HDMI sink (RX) Subsystem
- One, two or four pixel-wide video interface over AXI-4 stream
- Automatic video timing generation
- Separate PHY and Control layer allowing user flexibility to share GTs between Receive and Transmit
- Video resolutions up to UHD @ 60 fps
- Video encoding RGB 4:4:4, YUV4:4:4, YUV 4:2:2 and YUV 4:2:0
- Deep color support (24, 30, 36 and 48-bits per pixel)
- Audio up to 8 channels
- Info frames
- Data Display Channel (DDC)
- Hot plug / EDID
- Optional HDCP support
Technical Specifications
Related IPs
- HDMI 1.4 transmitter IP core is ideal for DVD, Blu-Ray Disc players, set-top boxes, A/V receivers
- IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- HDMI ver1.3 Receiver IP
- HDMI ver1.3 Transmitter IP
- HDMI 1.4 Rx PHY & Controller IP, Silicon Proven in TSMC 65/55LP
- HDMI 1.4 Tx PHY & Controller IP, Silicon Proven in TSMC 65/55GP